| Rule Violations |
Count |
| Clearance Constraint (Gap=4mil) (IsStitchingVia and InNet('GND')),((IsVia and (Not IsStitchingVia)) Or IsPad) |
0 |
| Clearance Constraint (Gap=4mil) (IsStitchingVia and InNet('GND_RF')),((IsVia and (Not IsStitchingVia)) Or IsPad) |
0 |
| Clearance Constraint (Gap=4mil) (All),(All) |
0 |
| Clearance Constraint (Gap=10mil) (InNamedPolygon('NONET_TOP_LAYER_P040')),(InNet('GND_RF')) |
0 |
| Clearance Constraint (Gap=0mil) (InNamedPolygon('NONET_TOP_LAYER_P040')),(All) |
0 |
| Short-Circuit Constraint (Allowed=No) (InNet('NetC19_2')),(InNet('VLDO')) |
0 |
| Short-Circuit Constraint (Allowed=Yes) (InNamedPolygon('NONET_TOP_LAYER_P040')),(InNamedPolygon('Top Layer-GND_RF')) |
0 |
| Un-Routed Net Constraint ( (All) ) |
0 |
| Modified Polygon (Allow modified: No), (Allow shelved: No) |
0 |
| Width Constraint (Min=4mil) (Max=51.181mil) (Preferred=6mil) (All) |
0 |
| Power Plane Connect Rule(Relief Connect )(Expansion=100mil) (Conductor Width=100mil) (Air Gap=100mil) (Entries=4) (All) |
0 |
| Hole Size Constraint (Min=1mil) (Max=200mil) (All) |
0 |
| Hole To Hole Clearance (Gap=5mil) (All),(All) |
0 |
| Minimum Solder Mask Sliver (Gap=0mil) (All),(All) |
0 |
| Silk To Solder Mask (Clearance=0mil) (IsPad),(All) |
0 |
| Silk to Silk (Clearance=0mil) (All),(All) |
0 |
| Net Antennae (Tolerance=0mil) (All) |
0 |
| Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) |
0 |
| Total |
0 |
